The present invention relates to computer systems, particularly those having cache memories.
Basically, a computer system includes a processor and a memory. Data and/or instructions (hereinafter referred to as information) are written into and read from the memory by the processor. To expedite computer operations, the memory in most modern computer systems includes a main memory and at least one cache memory which is disposed between the main memory and the processor. As is well known in the computer arts, cache memory is utilized to store the information most frequently involved with the operations of the computer system. Consequently, the information storage capacity of the cache memory is much smaller than that of the main memory and therefore, the very nature of the cache memory is to expedite information access and thereby speed up the operations of the computer system. Although cache memories have been particularly arranged in the prior art to expedite computer operations, the ever increasing speed of processors renders it desirable to further improve memory arrangements for expediting computer operations.